1. Field of Invention
This invention relates to read-only-memory (ROM) components and to methods for manufacturing same, and, more particularly, to such ROM components and manufacturing methods in which a silicon controlled rectifier structure is included and formed having a memory coded through the formation of contact windows so that each basic memory unit is a silicon controlled rectifier.
2. Description of Related Art
ROMs are now widely used in digital equipment such as microcomputers and microprocessor operating systems. Resident programs used by operating systems such as BIOS are normally kept in ROMs. Due to the complicated manufacturing processes for ROMs, involving many time consuming steps and material processings, generally, customers will submit their program codes to a ROM manufacturer, and have the manufacturer code the programs into their ROM products.
Most of the ROM components, aside from a difference in the code being stored in the programming phase, basically have the same physical structure. Therefore, the ROMs can be manufactured up to the step immediately before actual programming, and the partially finished products can be inventoried in a warehouse, for example. When the customer makes an order for a certain program code to be installed in the ROM, a set of photomasks can be promptly manufactured and subsequent programming carried out with short notice. The practice of photomask programming on prefabricated ROM is now becoming the norm in the semiconductor manufacturing industry.
In general, a channel transistor is employed as the basic memory cell unit of a ROM, and during the programming phase, ions are selectively implanted into specified channels so as to adjust the threshold voltage to achieve the ON/OFF state of the channel transistor. For a better understanding of the manufacturing processes and operations presently used to create a ROM, FIGS. 1A through 1C show the structure of a conventional ROM. FIG. 1A shows part of the top, FIG. 1B shows part of the front, while FIG. 1C shows part of a cross-sectional elevation of the ROM. A conventional ROM structure includes a substrate 10, for example, a P-type silicon substrate, having a plurality of bit lines (BL) 11, an oxide layer 12 and a plurality of word lines (WL) 13 formed on top. In the ROM structure shown in FIG. 1A, areas 14 enclosed by the rectangular dashed lines form the memory units. Whether a binary bit of "0" or "1" is burnt in a binary level memory unit is determined solely by whether or not ions are implanted into the channel 16 of the memory unit.
FIG. 1C shows a manufacturing method for a conventional ROM. First, N-type impurities such as arsenic ions are implanted into a substrate 10 forming a plurality of equidistantly distributed bit lines 11, and the area between two bit lines 11 constitute a channel region 16. Next, an oxidation process is carried out to form an oxide layer 12 on the surface of the bit lines 11 and the channel regions 16. Then, a conductive layer, for example, a heavily doped polysilicon layer, is formed, followed by photolithographic and etching processes to form word lines 13 that cross over the bit lines 11, thus establishing the channel transistors and finishing the necessary steps for the first half of the fabrication of a conventional ROM. Subsequently, programs are coded by first forming a masking layer 15 that exposes the desired coding channel regions 16, and then implanting P-type impurities, for example, boron ions, to complete the coding implantation. Different doping sources can be used to acquire the necessary properties for the transistors while the ROM is undergoing a programming operation.
The conventional ROM described above uses a channel transistor as the basic ROM unit. The manufacturing steps required for the formation of the channel transistors are rather complicated, and the coding implant must be performed before the completion of the channel transistors. Hence manufacturing options are quite limited.
Another limitation in the conventional ROM is due to the rather large surface area occupied by each MOS transistor, so that when the MOS transistors are scaled down, punch through phenomenon can easily occur. As a result, increase in the level of component integration is somewhat restricted.